A 3 V, 0.35 /spl mu/m CMOS Bluetooth receiver IC

Author

Wenjun Sheng ; Bo Xia ; Emira, A. ; Chunyu Xin ; Valero-Lopez, A.Y. ; Sung Tae Moon ; Sanchez-Sinencio, E.

Author_Institution

Dept. of Electr. Eng., Texas A&M Univ., College Station, TX, USA

fYear

2002

fDate

3-4 June 2002

Firstpage

107

Lastpage

110

Abstract

This paper presents a monolithic low-IF Bluetooth receiver. The highlights of the receiver include a low-power active complex filter with a non-conventional tuning scheme and a high performance mixed-mode GFSK demodulator. The chip was fabricated on a 6.25 mm/sup 2/ die using TSMC 0.35 /spl mu/m standard CMOS process. -82 dBm sensitivity at 1e-3 BER, -10 dBm IIP3 and 15 dB noise figure were achieved In the measurements.

Keywords

CMOS integrated circuits; demodulators; digital radio; frequency hop communication; frequency shift keying; mixed analogue-digital integrated circuits; radio receivers; spread spectrum communication; 0.35 micron; 15 dB; 3 V; BER; CMOS Bluetooth receiver IC; TSMC standard CMOS process; bit error rate; low-power active complex filter; mixed-mode GFSK demodulator; monolithic low-IF receiver; tuning scheme; Active filters; Bit error rate; Bluetooth; CMOS integrated circuits; CMOS process; Demodulation; Measurement standards; Monolithic integrated circuits; Noise figure; Noise measurement;

fLanguage

English

Publisher

ieee

Conference_Titel

Radio Frequency Integrated Circuits (RFIC) Symposium, 2002 IEEE

Conference_Location

Seattle, WA, USA

ISSN

1529-2517

Print_ISBN

0-7803-7246-8

Type

conf

DOI

10.1109/RFIC.2002.1011934

Filename

1011934