Title :
Design of set-valued logic networks for wave-parallel computing
Author :
Yuminaka, Yasushi ; Aoki, Takafumi ; Higuchi, Tatsuro
Author_Institution :
Tohoku Univ., Sendai, Japan
Abstract :
A design for set-valued logic (SVL) networks that provides a solution to interconnection problems in highly parallel VLSI systems is presented. The basic concept is frequency multiplexing of logic values, which enables the parallelism of electrical (or optical) waves to be used for parallel processing. This wave-parallel computing concept is capable of performing several independent binary functions in parallel with a single module. The systematic synthesis of a wave-parallel computing system is discussed, and the possible implementation of SVL networks is addressed
Keywords :
logic circuits; logic design; parallel architectures; binary functions; frequency multiplexing; highly parallel VLSI; interconnection problems; set-valued logic networks; wave-parallel computing; Computer architecture; Computer networks; Design engineering; Frequency; Integrated circuit interconnections; Logic design; Optical filters; Parallel processing; Systems engineering and theory; Very large scale integration;
Conference_Titel :
Multiple-Valued Logic, 1993., Proceedings of The Twenty-Third International Symposium on
Conference_Location :
Sacramento, CA
Print_ISBN :
0-8186-3350-6
DOI :
10.1109/ISMVL.1993.289547
