Title :
A 14.5 GHz, 0.35 /spl mu/m frequency divider for dual-modulus prescaler
Author :
Tournier, E. ; Sie, M. ; Graffeuil, J.
Author_Institution :
Lab. d´Autom. et d´Anal. des Syst., CNRS, Toulouse, France
Abstract :
This paper reports on structures of frequency divider to be used in the first stage of a dual modulus prescaler. A divider by 2, the prescaler elementary cell, has been designed and characterized. A 4/5 divider is presented as a natural extension of the divider by 2. A first realization has been characterized. We show that an asynchronous structure can overcome the synchronous structure frequency limitations.
Keywords :
asynchronous circuits; frequency dividers; prescalers; 0.35 micron; 14.5 GHz; 4/5 divider; asynchronous structure; dual-modulus prescaler; frequency divider; frequency limitations; prescaler elementary cell; Asynchronous circuits; CMOS logic circuits; Clocks; Flip-flops; Frequency conversion; Latches; Logic gates; Logic programming; Microelectronics; Radiofrequency integrated circuits;
Conference_Titel :
Radio Frequency Integrated Circuits (RFIC) Symposium, 2002 IEEE
Conference_Location :
Seattle, WA, USA
Print_ISBN :
0-7803-7246-8
DOI :
10.1109/RFIC.2002.1012037
