DocumentCode :
1838424
Title :
Novel pulse pressure CVD for void free STI trench TEOS fill
Author :
Nakamura, Takashi
Author_Institution :
Yasu Semicond. Corp., Shiga, Japan
fYear :
2001
fDate :
2001
Firstpage :
117
Lastpage :
120
Abstract :
Because it minimizes the spaces between transistors, the aspect ratio of shallow trench isolation (STI) becomes large and it gets difficult to fill STI by conventional LP-CVD TEOS SiO2 film without void formation. A high-density plasma deposition process has been evaluated for better STI fill instead of LP-CVD, however, the new equipment costs more than that for LP-CVD. This paper describes a new technique, a pulse pressure chemical vapor deposition (CVD) method for STI fill without forming any voids by using conventional LP-CVD equipment. Pulse pressure enables a uniform source gas supply to the STI trench and a conformal film deposition without voids
Keywords :
VLSI; chemical vapour deposition; isolation technology; silicon compounds; voids (solid); 10 to 30 mtorr; 2 torr; 700 C; STI trench TEOS fill; SiO2; TEOS oxide; chemical vapor deposition; conformal film deposition; conventional LP-CVD equipment; pulse pressure CVD method; shallow trench isolation; tetraethoxysilane; uniform source gas supply; void formation; void free trench fill; Chemical vapor deposition; Conductive films; Costs; Etching; Plasma applications; Plasma chemistry; Scanning electron microscopy; Semiconductor films; Silicon; Temperature;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Semiconductor Manufacturing Symposium, 2001 IEEE International
Conference_Location :
San Jose, CA
Print_ISBN :
0-7803-6731-6
Type :
conf
DOI :
10.1109/ISSM.2001.962928
Filename :
962928
Link To Document :
بازگشت