DocumentCode :
1838430
Title :
Synchronization in a discrete phase-locked loop
Author :
Bozena, S.
Author_Institution :
Instytut Podstaw Elektroniki, Politechnika Warszawska
fYear :
1988
fDate :
7-9 Jun 1988
Firstpage :
607
Abstract :
A 1-D model of the discrete phase-locked loop (DPLL) is examined. When calculating synchronization zones in a circuit it is customary to use the rotation number as the basis. There are systems in which rotation-number bifurcation takes place, such as a VCO, whose rotation number is, for fixed values of the parameters, an interval, not a single point. It is proposed that the ends of the interval be obtained from the so-called upper and lower functions. The theoretical analysis has been confirmed by computation experiments
Keywords :
phase-locked loops; synchronisation; variable-frequency oscillators; 1D model; VCO; bifurcation; computation experiments; discrete phase-locked loop; rotation number; synchronization zones; Bifurcation; Capacitors; Circuits; Equations; National electric code; Phase locked loops; Signal mapping; Switches; Voltage; Voltage-controlled oscillators;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 1988., IEEE International Symposium on
Conference_Location :
Espoo
Type :
conf
DOI :
10.1109/ISCAS.1988.14999
Filename :
14999
Link To Document :
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