Timing-driven X-architecture router among rectangular obstacles

In this paper, we formulate a timing-driven obstacle-avoiding X-architecture Steiner minimal tree (TOA-XSMT) problem, and propose a timing-driven routing tree construction which simultaneously minimizes the maximum source-to-terminal delay and the total wirelength. First, we construct a spanning graph by the terminals and the obstacles. Second, a minimal spanning tree is obtained in a spanning graph. Third, we transform a spanning tree into a feasible X-architecture tree. Fourth, for each terminal of the routing tree, the delay is computed by a modified Elmore delay model. Fifth, an efficient rerouting method is used to improve all timing violations which their delay are over a user-defined threshold. Finally, the critical terminals are rerouted by splitting and merging procedure. Compared to the result without rerouting, the maximum source-to-terminal delay is reduced by 60.8% with the 0.7% additional total wirelength.