• DocumentCode
    1839324
  • Title

    Low-power static and dynamic high-voltage CMOS level-shifter circuits

  • Author

    Khorasani, Maziyar ; Van den Berg, Leendert ; Marshall, Philip ; Zargham, Meysam ; Gaudet, Vincent ; Elliott, Duncan ; Martel, Stephane

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Univ. of Alberta, Edmonton, AB
  • fYear
    2008
  • fDate
    18-21 May 2008
  • Firstpage
    1946
  • Lastpage
    1949
  • Abstract
    Pseudo-NMOS level-shifters consume large static current making them unsuitable for portable devices implemented with HV CMOS. Dynamic level-shifters help reduce power consumption. To reduce on-current to a minimum (sub-nanoamp), modifications are proposed to existing pseudo-NMOS and dynamic level-shifter circuits. A low power three transistor static level-shifter design with a resistive load is also presented.
  • Keywords
    CMOS integrated circuits; network synthesis; dynamic high-voltage CMOS level-shifter circuits; dynamic level-shifter circuits; low-power static; portable devices; pseudo-NMOS level-shifters; three transistor static level-shifter design; Breakdown voltage; CMOS process; CMOS technology; Communication industry; Dynamic voltage scaling; Energy consumption; Integrated circuit technology; MOS devices; MOSFETs; Vehicle dynamics;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 2008. ISCAS 2008. IEEE International Symposium on
  • Conference_Location
    Seattle, WA
  • Print_ISBN
    978-1-4244-1683-7
  • Electronic_ISBN
    978-1-4244-1684-4
  • Type

    conf

  • DOI
    10.1109/ISCAS.2008.4541825
  • Filename
    4541825
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1839324