DocumentCode
1839644
Title
The Motorola 68060 microprocessor
Author
Circello, J. ; Goodrich, F.
Author_Institution
Motorola Inc., Austin, TX, USA
fYear
1993
fDate
22-26 Feb. 1993
Firstpage
73
Lastpage
78
Abstract
The Motorola 68060, the fourth-generation microprocessor of the M68000 family, is described. Using object code compatible with previous family members, it delivers 3 to 3.5 times the performance of the previous generation processor in this family, the 68040. Performance features include a superscalar integer unit, a high-performance floating point unit, dual 8-kbyte on-chip caches, a branch cache, and on-chip memory management units. A streamlined design enables high-performance techniques to achieve a high level of parallel instruction execution. Improved performance at a low cost makes the 68060 an ideal processor for the mid to high range of desktop computing applications, and compatibility features enable it to easily upgrade the performance of existing 68040-based systems. The operation of the 68060 is described.<>
Keywords
instruction sets; microprocessor chips; performance evaluation; Motorola 68060 microprocessor; branch cache; dual 8-kbyte on-chip caches; high-performance floating point unit; memory management; parallel instruction execution; performance; superscalar integer unit; Access protocols; Clocks; Control systems; High performance computing; Memory management; Microprocessors; Pipelines; Portable computers; Power supplies; System-on-a-chip;
fLanguage
English
Publisher
ieee
Conference_Titel
Compcon Spring '93, Digest of Papers.
Conference_Location
San Francisco, CA, USA
Print_ISBN
0-8186-3400-6
Type
conf
DOI
10.1109/CMPCON.1993.289639
Filename
289639
Link To Document