Hobbit: a high-performance, low-power microprocessor

Author

Argade, P.V. ; Aymeloglu, S. ; Berenbaum, A.D. ; dePaolis, M.V., Jr. ; Franzo, R.T. ; Freeman, R.D. ; Inglis, D.A. ; Komoriya, G. ; Lee, H. ; Little, T.R. ; MacDonald, G.A. ; McLellan, H.R. ; Morgan, E.C. ; Pham, H.Q. ; Ronkin, G.D. ; Scavuzzo, R.J. ; Woc

Author_Institution

AT&T Bell Labs., Allentown, PA, USA

fYear

1993

fDate

22-26 Feb. 1993

Firstpage

88

Lastpage

95

Abstract

The class of portable hybrid computer/communication devices called personal communicators requires a microprocessor that simultaneously maximizes performance and minimizes power dissipation and silicon real estate. AT&T´s 92010 Hobbit microprocessor combines reduced instruction set computer (RISC) architectural features, some non-RISC features, and an innovative electrical implementation to exactly target the personal communicator application. The authors give an overview of the Hobbit architecture and implementation, and demonstrate how the design achieved superior performance and low power. At 20 MHz, the performance of Hobbit is 13.5 VAX MIPS and 27000 Dhrystones/s, with only 250 mW of power at 3.3 V and 900 mW at 5.0 V. The performance/power ratio of 54 VAX MIPS/W is significantly superior to that of conventional RISC and CISC microprocessors.<>

Keywords

microprocessor chips; reduced instruction set computing; 20 MHz; 250 mW; 3.3 V; 5.0 V; 900 mW; AT&T´s 92010; Hobbit; high-performance; low-power microprocessor; personal communicators; portable hybrid computer/communication devices; power dissipation; reduced instruction set computer; silicon real estate; Batteries; Computer architecture; Costs; Delay; Microprocessors; Power dissipation; Reduced instruction set computing; Registers; Silicon; User interfaces;

fLanguage

English

Publisher

ieee

Conference_Titel

Compcon Spring '93, Digest of Papers.

Conference_Location

San Francisco, CA, USA

Print_ISBN

0-8186-3400-6

Type

conf

DOI

10.1109/CMPCON.1993.289642

Filename

289642