DocumentCode
1839719
Title
Thermal fatigue of solder flip-chip assemblies
Author
Roesner, B. ; Baraton, X. ; Guttmann, K. ; Samin, C.
Author_Institution
Thomson Multimedia, Villingen, Germany
fYear
1998
fDate
25-28 May 1998
Firstpage
872
Lastpage
877
Abstract
Recently several low cost alternatives to the flip-chip interconnection technology have been investigated. The scope of the paper is a reliability study of flip-chip assemblies on various substrates (mainly FR4). The deterioration (characterised by the electrical resistance) of 63Sn37Pb and of 96.5Sn3.5Ag bumps caused by both thermal cycling and thermal shock will be described. Samples with and without encapsulated flip-chip interconnections have been investigated. It has been found that the relationship, the number of the thermal cycles to destruction of the bumps as a function of chip size, and bump height obeys the Coffin-Manson equation. TV tuner circuits are a potential application of flip-chip technology. It has been experimentally verified that flip-chip contacts exhibit superior high frequency performance compared to those assembled in chip and wire and/or in using SO package
Keywords
encapsulation; flip-chip devices; integrated circuit reliability; lead alloys; silver alloys; soldering; thermal stress cracking; tin alloys; Coffin-Manson equation; SnAg; SnPb; chip size; electrical resistance; encapsulated flip-chip interconnections; high frequency performance; reliability study; solder flip-chip assemblies; thermal cycling; thermal fatigue; thermal shock; Assembly; Costs; Electric resistance; Electric shock; Equations; Fatigue; Integrated circuit interconnections; TV; Thermal resistance; Tuners;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronic Components & Technology Conference, 1998. 48th IEEE
Conference_Location
Seattle, WA
ISSN
0569-5503
Print_ISBN
0-7803-4526-6
Type
conf
DOI
10.1109/ECTC.1998.678810
Filename
678810
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