Title :
The synergistic effect of thread scheduling and caching in multithreaded computers
Author :
McCrackin, Daniel C.
Author_Institution :
Dept. of Electr. & Comput. Eng., McMaster Univ., Hamilton, Ont., Canada
Abstract :
The author investigates combining two techniques-thread scheduling and context switching on cache misses-in a multithreaded computer. By means of a simple simulation model for an eight-stage pipeline, it is demonstrated that these two techniques act together to allow higher overall processor performance with fewer running threads than the number of pipeline stages. Thus, two of the problems with multithreaded machines-a large number of required threads and poor cache performance-are reduced.<>
Keywords :
parallel architectures; performance evaluation; scheduling; caching; context switching; eight-stage pipeline; higher overall processor performance; multithreaded computers; multithreaded machines; simulation model; synergistic effect; thread scheduling; Clocks; Computational modeling; Counting circuits; Delay; Hardware; Hazards; Pipeline processing; Processor scheduling; Registers; Yarn;
Conference_Titel :
Compcon Spring '93, Digest of Papers.
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-8186-3400-6
DOI :
10.1109/CMPCON.1993.289656
