Dual damascene process for air-gap Cu interconnects using conventional CVD films as sacrificial layers

Author

Uno, Shouichi ; Noguchi, Junji ; Ashihara, Hiroshi ; Oshima, Takayuki ; Sato, Kiyohiko ; Konishi, Nobuhiro ; Saito, Tatsuyuki ; Hara, Kazusato

Author_Institution

Micro Device Div., Hitachi Ltd., Tokyo, Japan

fYear

2005

fDate

6-8 June 2005

Firstpage

174

Lastpage

176

Abstract

A dual damascene Cu air-gap interconnect was investigated. To solve issues such as cost and electrical shorts from CMP scratches, a conventional CVD film was used as a sacrificial layer instead of the SOD film that we reported previously. The process integration, electrical characteristics and the TDDB reliability were discussed. The TDDB lifetime was drastically improved, and 4 levels of dual damascene Cu interconnects were successfully fabricated.

Keywords

CVD coatings; copper; electric breakdown; integrated circuit interconnections; integrated circuit metallisation; integrated circuit reliability; CMP scratches; CVD film sacrificial layers; Cu; TDDB lifetime; TDDB reliability; air-gap interconnects; dual damascene process; electrical shorts; process integration; Air gaps; Costs; Delay; Dielectrics; Electric variables; Etching; Plasma applications; Protection; Surface treatment; Wire;

fLanguage

English

Publisher

ieee

Conference_Titel

Interconnect Technology Conference, 2005. Proceedings of the IEEE 2005 International

Print_ISBN

0-7803-8752-X

Type

conf

DOI

10.1109/IITC.2005.1499969

Filename

1499969

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1840213