DocumentCode :
1840289
Title :
[Title page]
fYear :
2012
fDate :
9-14 Sept. 2012
Firstpage :
1
Lastpage :
1
Abstract :
The following topics are dealt with: advanced CMOS on-chip protection; system level testing; ESD electronic design automation; process simulation; failure analysis methods; EMC physics-based ESD analysis; RF on-chip protection; high voltage on-chip protection; and system level ESD analysis.
Keywords :
CMOS integrated circuits; circuit simulation; electromagnetic compatibility; electronic design automation; electrostatic discharge; failure analysis; integrated circuit testing; radiofrequency integrated circuits; system-on-chip; EMC; ESD electronic design automation; RF on-chip protection; advanced CMOS on-chip protection; failure analysis methods; high voltage on-chip protection; physics-based ESD analysis; process simulation; system level ESD analysis; system level testing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electrical Overstress/Electrostatic Discharge Symposium (EOS/ESD), 2012 34th
Conference_Location :
Tucson, AZ
ISSN :
0739-5159
Print_ISBN :
978-1-4673-1467-1
Type :
conf
Filename :
6333290
Link To Document :
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