Title :
Wafer-level microfluidic cooling interconnects for GSI
Author :
Bing Dang ; Joseph, P. ; Bakir, M. ; Spencer, T. ; Kohl, P. ; Meindl, J.
Author_Institution :
Sch. of Electr. & Comput. Eng., Georgia Inst. of Technol., Atlanta, GA, USA
Abstract :
We present a novel CMOS compatible approach to fabricate on-chip microfluidic cooling channels using a spin-on sacrificial polymer material at wafer level. Deep trenches (>100 /spl mu/m) etched into the backside of an IC wafer were successfully filled up by a single spin coating step with a high viscosity sacrificial polymer. A porous overcoat material allows the decomposition of the polymer to form enclosed microchannels. Through chip holes and polymer pipes are used as the inlet/outlet interconnects. Different channel array designs were described and the pressure drop was estimated for a heat flux of 100 W/cm/sup 2/ with DI water flow rate. The resulting cooling scheme offers a simple and compact solution to transfer cooling liquid directly into a GSI chip and is fully compatible with flip-chip packaging.
Keywords :
CMOS integrated circuits; coatings; cooling; integrated circuit interconnections; microfluidics; polymers; wafer-scale integration; CMOS compatible approach; GSI; IC wafer; channel array designs; enclosed microchannels; flip-chip packaging; high viscosity sacrificial polymer; inlet/outlet interconnects; on-chip microfluidic cooling channels; polymer pipes; porous overcoat material; pressure drop; single spin coating step; spin-on sacrificial polymer material; through chip holes; wafer-level interconnects; CMOS technology; Chemical technology; Cooling; Etching; Fabrication; Flip chip; Microchannel; Microfluidics; Packaging; Polymer films;
Conference_Titel :
Interconnect Technology Conference, 2005. Proceedings of the IEEE 2005 International
Conference_Location :
Burlingame, CA, USA
Print_ISBN :
0-7803-8752-X
DOI :
10.1109/IITC.2005.1499971