DocumentCode :
1840406
Title :
An analysis of the effect of wire resistance on circuit level performance at the 45-nm technology node
Author :
Nguyen, Viet H. ; Christie, Phillip ; Heringa, Anco ; Kumar, Aatish ; Ng, Ranick
Author_Institution :
Philips Res. Leuven, Belgium
fYear :
2005
fDate :
6-8 June 2005
Firstpage :
191
Lastpage :
193
Abstract :
The paper presents a method for assessing the impact of interconnects on dynamic system level performance. The method is applied to the analysis of the impact of interconnect parasitic resistance and capacitance on the performance of different circuit types at the 45-nm technology node. It is observed that the interconnect capacitance dominates circuit performance at short interconnect lengths. The interconnect resistance influences low-power (high-speed) circuit speed only for critical wire lengths longer than 360 μm (180 μm). Within the investigated interconnect lengths, the interconnect resistance has virtually no impact on the switching energy of the test circuit. The results indicate that for low-power circuits, the high interconnect resistance is not a serious issue at the 45-nm technology node.
Keywords :
capacitance; electric resistance; integrated circuit interconnections; 45 nm; circuit level performance; dynamic system level performance; interconnect capacitance; interconnect length; interconnect parasitic capacitance; interconnect parasitic resistance; interconnect resistance; switching energy; wire resistance; Circuit optimization; Circuit testing; Geometry; Integrated circuit interconnections; Logic circuits; Logic gates; Parasitic capacitance; Performance analysis; Ring oscillators; Wire;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Interconnect Technology Conference, 2005. Proceedings of the IEEE 2005 International
Print_ISBN :
0-7803-8752-X
Type :
conf
DOI :
10.1109/IITC.2005.1499976
Filename :
1499976
Link To Document :
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