Title :
A novel method for ESD soft error analysis on integrated circuits using a TEM cell
Author :
Lee, Jongsung ; Lim, Jaedeok ; Seol, Byongsu ; Li, Zhen ; Pommerenke, David
Author_Institution :
Samsung Electron. Co., Ltd., Suwon, South Korea
Abstract :
The ultimate goal of this work is to predict ESD system level behavior. A methodology which can evaluate the IC immunity in terms of ESD-induced soft error is introduced. A modified TEM cell and a simple test board with a memory IC are designed for this purpose. The correlation between product level ESD standard test and the proposed IC immunity test is discussed.
Keywords :
electrostatic discharge; error analysis; integrated circuit design; integrated circuit testing; storage management chips; ESD system level behavior prediction; ESD-induced soft error analysis; IC immunity; integrated circuits; memory IC design; modified TEM cell; product level ESD standard test; test board; transverse electromagnetic mode cell; Couplings; Electrostatic discharges; Generators; Integrated circuits; Noise; TEM cells;
Conference_Titel :
Electrical Overstress/Electrostatic Discharge Symposium (EOS/ESD), 2012 34th
Conference_Location :
Tucson, AZ
Print_ISBN :
978-1-4673-1467-1
