Temperature performance of sub-1V ultra-low power current sources

This paper presents the temperature performance of two self-biased current sources. We have employed a simple topology to design 4 nA and 900 pA current references implemented in both 0.35 mum and 0.18 mum technologies, respectively. Experimental results showed that the current source implemented in 0.35 mum technology can operate at a supply voltage as low as IV and at 650 mV in 0.18 mum CMOS technology. The temperature performance of the current source is analyzed in this paper. The association of a very simple topology, an efficient design procedure, low voltage cascode transistor and low output conductance trapezoidal transistors has resulted in small area, ultra low power consumption and a line regulation better than 0.2%/V of supply voltage.