Title :
A novel topology in reversed nested miller compensation using dual-active capacitance
Author :
Jalalifar, Majid ; Yavari, Mohammad ; Raissi, Farshid
Author_Institution :
Dept. of Electr. Eng., K.N. Toosi Univ. of Technol., Tehran
Abstract :
A novel three-stage amplifier topology for low- voltage and large capacitive load applications is proposed. This scheme is called the dual-active capacitance in reversed nested miller compensation (DACRNMC). The frequency bandwidth of the DACRNMC amplifier is improved due to the usage of active compensation capacitors. The amplifier´s die area is reduced compared to the existing techniques in reversed nested miller compensation (RNMC) scheme. Moreover, the presence of two left-half-plane zeros in the amplifier´s frequency response enhances the stability and hence improves the settling behavior of the amplifier. The circuit level simulation results of the proposed amplifier with a 0.18 mum standard CMOS process achieve 20 MHz unity gain bandwidth and 59 degree phase margin, while driving 500 pF load from a single 1.5 V power supply.
Keywords :
CMOS analogue integrated circuits; amplifiers; frequency response; network topology; CMOS process; DACRNMC amplifier; active compensation capacitors; bandwidth 20 MHz; capacitance 500 pF; dual-active capacitance; frequency response; reversed nested miller compensation; size 0.18 mum; three-stage amplifier topology; voltage 1.5 V; Bandwidth; CMOS process; Capacitance; Capacitors; Circuit simulation; Circuit stability; Frequency response; Power amplifiers; Topology; Voltage;
Conference_Titel :
Circuits and Systems, 2008. ISCAS 2008. IEEE International Symposium on
Conference_Location :
Seattle, WA
Print_ISBN :
978-1-4244-1683-7
Electronic_ISBN :
978-1-4244-1684-4
DOI :
10.1109/ISCAS.2008.4541906
