Title :
Novel test structure for the measurement of electrostatic discharge pulses
Author :
Lendenmann, H. ; Schrimpf, R.D. ; Bridges, A.D.
Author_Institution :
Dept. of Electr. & Comput. Eng., Arizona Univ., Tucson, AZ, USA
Abstract :
A test structure for measuring electrostatic discharge (ESD) pulses using a floating gate transistor is presented. It is found that ESD pulses of widely ranging magnitudes can cause a shift in the threshold voltage of a floating gate transistor. The change in device characteristics is quantified by measuring the drain current. For a given geometry, the response is proportional to the magnitude of the ESD event for a particular range of voltages. This particular range of sensitivity also scales linearly with the capacitance ratio of the presented devices. For larger ratios of capacitance, a different scaling mechanism is observed. The sensitivity determined is 60 V.<>
Keywords :
MOS integrated circuits; electrostatic discharge; integrated circuit technology; integrated circuit testing; reliability; 60 V; ESD pulses; MOS ICs; capacitance ratio; floating gate transistor; linear response; measurement of electrostatic discharge pulses; test structure; threshold voltage shift; Distortion measurement; Electrons; Electrostatic discharge; Electrostatic measurements; FETs; Nonvolatile memory; Pulse measurements; Semiconductor device measurement; Testing; Voltage;
Conference_Titel :
Microelectronic Test Structures, 1990. ICMTS 1990. Proceedings of the 1990 International Conference on
Conference_Location :
San Diego, CA, USA
DOI :
10.1109/ICMTS.1990.67895