DocumentCode
1842624
Title
HHMA: A Hierarchical Hybrid Memory Architecture Sharing Multi-Port Memory
Author
Liu, Caixia ; Li, Jiaxin ; Zhang, Hongli ; Zuo, Qi
Author_Institution
Sch. of Comput. Sci. & Technol., Beijing Inst. of Technol., Beijing
fYear
2008
fDate
18-21 Nov. 2008
Firstpage
1320
Lastpage
1325
Abstract
Rational memory architecture plays more and more roles on improving parallel communication performance of multi processor system. A hierarchical hybrid memory architecture constructed by sharing multi-port memory, HHMA, is proposed in this article. In HHMA, multi-port memories are adopted as the shared memory for processor nodes in different groups. The high parallelism of multi-port memory assures processor nodes to access memory at high parallel degree. Experiments showed that the node parallel degree when accessing shared memory in HHMA is higher than 90%.
Keywords
parallel memories; hierarchical hybrid memory architecture; multiport memory; multiprocessor system; parallel communication performance; rational memory architecture; shared memory; Computer architecture; Computer science; Concurrent computing; Costs; Delay; Large-scale systems; Memory architecture; Parallel processing; Scalability; Space technology; Memory architecture; multi-port memory; node parallel access degree;
fLanguage
English
Publisher
ieee
Conference_Titel
Young Computer Scientists, 2008. ICYCS 2008. The 9th International Conference for
Conference_Location
Hunan
Print_ISBN
978-0-7695-3398-8
Electronic_ISBN
978-0-7695-3398-8
Type
conf
DOI
10.1109/ICYCS.2008.184
Filename
4709164
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