Design and Evaluation of Optical Bus in High Performance Computer

With increase of IC clock frequency, copper interconnect in Print Circuit Board (PCB) reaches limitation. Inter-chip Optical Interconnect (OI) is ideal alternative solution and its technical challenges are being solved. Memory bus has most complex interface, most rigid bandwidth/latency demand and most serious signal integrity problems. When applying inter-chip OI on memory bus, extra latency effect should be has more rigid demand to latency, bandwidth, power and density than parallel bus and traditional communication system. Novel serial, point-to-point interconnect protocol which can take advantage of inter-chip OI is needed. However new challenges and difficulties are imported. This paper adopts memory bus as typical and challengeable application, analyzed latency of optical bus model. Based on test and evaluation result, we propose design and optimization principles of optical link protocol. Then an effectiveness model is proposed for bandwidth-latency compensation. By simulation result, we give out the evaluation principles, that is, under what condition, inter-chip OI is superior to copper interconnect.