DocumentCode :
1842826
Title :
An FPGA top-hat transform module with two different structure elements
Author :
Jianjun Huang ; Xiangang Zhu ; Yuan Zi
Author_Institution :
ATR Key Lab., Shenzhen Univ., Shenzhen, China
Volume :
1
fYear :
2012
fDate :
21-25 Oct. 2012
Firstpage :
465
Lastpage :
468
Abstract :
In this paper, a top-hat transformation module is implemented for infrared small target detection. The top-hat algorithm uses two different structure elements in erosion and dilation. Erosion implements a 5×5 ring structure element process unit while dilation implements a 3×3 structure element one. The time delay of open operation is formulated and used for background subtraction. The experiment shows that the designed module meets the real-time application requirement and has good performance in suppressing interference.
Keywords :
delays; field programmable gate arrays; interference suppression; object detection; FPGA; background subtraction; dilation; erosion; infrared small target detection; interference suppression; real-time application; ring structure element process; time delay; top-hat transformation module; Different structure elements; FPGA; Top-hat module;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Signal Processing (ICSP), 2012 IEEE 11th International Conference on
Conference_Location :
Beijing
ISSN :
2164-5221
Print_ISBN :
978-1-4673-2196-9
Type :
conf
DOI :
10.1109/ICoSP.2012.6491525
Filename :
6491525
Link To Document :
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