Title :
Using spatial information to analyze correlations between test structure data
Author :
Kibarian, John K. ; Strojwas, Andrzej J.
Author_Institution :
Dept. of Electr. & Comput. Eng., Carnegie Mellon Univ., Pittsburgh, PA, USA
Abstract :
A modeling strategy that captures the dependence of performances on the spatial position of the chips on the wafer is presented. The information from this model can be used to determine whether the variance and correlation of parameters are due to random variation or are a function of wafer position. Simulation or knowledge from process engineers can be used to determine whether the spatial correlation between two parameters is due to a single underlying cause or multiple causes. The spatial correlation can also be used to split the correlation matrix into two parts: the first matrix would contain correlations due to spatially dependent disturbances and the second would contain those due to disturbances not spatially dependent.<>
Keywords :
integrated circuit testing; modelling; semiconductor technology; correlations between test structure data; disturbances not spatially dependent; function of wafer position; modeling strategy; single; spatial correlation; spatial information; spatially dependent disturbances; Computational modeling; Covariance matrix; Fluctuations; Information analysis; Measurement standards; Process control; Random variables; Semiconductor device measurement; Semiconductor device modeling; Testing;
Conference_Titel :
Microelectronic Test Structures, 1990. ICMTS 1990. Proceedings of the 1990 International Conference on
Conference_Location :
San Diego, CA, USA
DOI :
10.1109/ICMTS.1990.67901
