Data-Based Load-Pull Simulation for Large-Signal Transistor Model Validation

A new method for large-signal transistor model validation is described. Previous methods of large-signal model validation were done without incorporating the effect of harmonic termination. The proposed method couples a harmonic-balance engine with measured load-tuner s-parameter data at fundamental and harmonic frequencies. The load states are properly synchronized so that the transistor model is loaded in the simulation exactly as it is during load-pull characterization. Measured versus simulated results for 1 mm Fujitsu GaAs MESFET at 2 GHz are presented.