DocumentCode
1844056
Title
Design of UWB LNA in 45nm CMOS technology: Planar bulk vs. FinFET
Author
Ponton, D. ; Palestri, P. ; Esseni, D. ; Selmi, L. ; Tiebout, M. ; Parvais, B. ; Knoblinger, G.
Author_Institution
DIEGM, Univ. of Udine, Udine
fYear
2008
fDate
18-21 May 2008
Firstpage
2701
Lastpage
2704
Abstract
This paper describes the design of a single-stage differential low noise amplifier (LNA) for ultra wide band(UWB) applications, implemented in state of the art Planar and FinFET 45 nm CMOS technologies. A gm-boosted topology has been chosen and the LNA has been designed to work over the whole UWB band (3.1 - 10.6 GHz), while driving a capacitive load. The simulations highlight that, at the present stage of the technology development, the Planar version of the LNA outperforms the FinFET one thanks to the superior cutoff frequency fT of Planar devices in the inversion region, achieving comparable Noise Figure and voltage gain, but consuming less power.
Keywords
CMOS integrated circuits; MOSFET; differential amplifiers; low noise amplifiers; ultra wideband technology; CMOS technology; FinFET; UWB LNA; differential low noise amplifier; frequency 3.1 GHz to 10.6 GHz; size 45 nm; ultrawide band application; CMOS technology; Character generation; FinFETs; Noise figure; Noise measurement; Radio frequency; Resistors; Topology; Voltage; Wideband;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2008. ISCAS 2008. IEEE International Symposium on
Conference_Location
Seattle, WA
Print_ISBN
978-1-4244-1683-7
Electronic_ISBN
978-1-4244-1684-4
Type
conf
DOI
10.1109/ISCAS.2008.4542014
Filename
4542014
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