DocumentCode
1844292
Title
Language design requirements for VHDL-RF/MW/sup TM/
Author
Willis, J. ; Johnson, J.
Author_Institution
FTL Syst. Inc., Rochester, MN, USA
Volume
3
fYear
2002
fDate
2-7 June 2002
Firstpage
2093
Abstract
This paper describes design requirements for VHDL-RF/MW/sup TM/. The resulting language design addresses distributed and full-wave interconnect models, frequency-domain modeling and parasitic interactions so as to maintain full conceptual and representational compatibility with VHDL, VHDL-AMS, Verilog, Verilog-AMS and SPICE.
Keywords
UHF circuits; hardware description languages; microwave circuits; millimetre wave circuits; 1 to 100 GHz; MM-wave design; RF design; VHDL-RF/MW; distributed interconnect models; frequency-domain modeling; full-wave interconnect models; language design requirements; microwave design; parasitic interactions; Aerospace electronics; Consumer products; Context modeling; Frequency domain analysis; Hardware design languages; LAN interconnection; Power system modeling; Radio frequency; SPICE; Telecommunications;
fLanguage
English
Publisher
ieee
Conference_Titel
Microwave Symposium Digest, 2002 IEEE MTT-S International
Conference_Location
Seattle, WA, USA
ISSN
0149-645X
Print_ISBN
0-7803-7239-5
Type
conf
DOI
10.1109/MWSYM.2002.1012282
Filename
1012282
Link To Document