DocumentCode
1844294
Title
Data-dependent truncation scheme for parallel multipliers
Author
King, Eric J. ; Swartzlander, Earl E., Jr.
Author_Institution
Crystal Semicond. Corp., Austin, TX, USA
Volume
2
fYear
1997
fDate
2-5 Nov. 1997
Firstpage
1178
Abstract
The variable correction truncated multiplier is introduced. This is a method for minimizing the error of a truncated multiplier. The error is reduced by using information from the partial product bits of the column adjacent to the truncated LSB. This results in a complexity savings while introducing minimum distortion to the result.
Keywords
digital arithmetic; error analysis; multiplying circuits; parallel processing; complexity savings; data-dependent truncation; error minimization; harmonic distortion; partial product bits; signal processing; sine wave analysis; truncated LSB; variable correction truncated multiplier; Computer errors; Computer industry; Distortion; Drives; Energy consumption; Equations; Error correction; Roundoff errors; Signal processing;
fLanguage
English
Publisher
ieee
Conference_Titel
Signals, Systems & Computers, 1997. Conference Record of the Thirty-First Asilomar Conference on
Conference_Location
Pacific Grove, CA, USA
ISSN
1058-6393
Print_ISBN
0-8186-8316-3
Type
conf
DOI
10.1109/ACSSC.1997.679090
Filename
679090
Link To Document