• DocumentCode
    1845181
  • Title

    Design of a high performance deadbeat-type current controller for LCL-filtered grid-parallel inverters

  • Author

    Jing Wang ; Yulun Song ; Monti, A.

  • Author_Institution
    E. ON Energy Res. Centre, Inst. for Autom. of Complex Power Syst., Aachen, Germany
  • fYear
    2015
  • fDate
    22-25 June 2015
  • Firstpage
    1
  • Lastpage
    8
  • Abstract
    This paper proposes a high performance deadbeat-type current controller for inverter-interfaced distributed generation (DG), with a simple design procedure, desirable control performance and ease of digital implementation. The control law of proposed deadbeat-type current controller has the same form as the conventional deadbeat controller. However, instead of directly inverting the controlled plant model, the polynomial coefficients of each variable in the deadbeat control law (the reference current, the output current and the grid voltage) are designed to satisfy the two design criteria: (1) the poles of the closed-loop system are all at the origin; (2) the gain of the disturbance input is minimized. The performance of the proposed controller is demonstrated with an example, and the controller is proven to be robust against plant parameter variation. The comparison between the proposed deadbeat-type controller and a well-tuned conventional double-loop controller shows significant improvement of the former in both steady-state and dynamic performance. The proposed deadbeat-type controller is implemented and tested in a Hardware-in-the-loop (HIL) platform and the experimental results validate the excellent control performance of the proposed controller and also its pratical feasibility.
  • Keywords
    closed loop systems; control system synthesis; distributed power generation; electric current control; invertors; power generation control; power generation faults; DG; HIL platform; LCL-filtered grid-parallel inverter; closed-loop system; deadbeat control law; digital implementation; dynamic performance; hardware-in-the-loop platform; high performance deadbeat-type current controller design; inverter-interfaced distributed generation; polynomial coefficient; steady-state performance; well-tuned conventional double loop controller; Admittance; Distortion; Inverters; Mathematical model; Polynomials; Robustness; Voltage control; Deadbeat-type Current Controller; Grid-parallel Inverters; hardware-in-the-loop; steady-state and dynamic response;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Power Electronics for Distributed Generation Systems (PEDG), 2015 IEEE 6th International Symposium on
  • Conference_Location
    Aachen
  • Type

    conf

  • DOI
    10.1109/PEDG.2015.7223112
  • Filename
    7223112