Quantitative extraction and compensation of excess inductance: case study of a digital attenuator chip

Author

Choi, S.C. ; Kwon, D.H. ; Kim, K.H. ; Hwang, S.W.

Author_Institution

Dept. of Electron. Eng., Korea Univ., Seoul, South Korea

Volume

3

fYear

2002

fDate

2-7 June 2002

Firstpage

2249

Abstract

The excess inductance of the conductor connecting the ground pins of the MMIC and the ground plane is extracted from a simplified procedure of measurement and optimization. The method is applied to a digital attenuator chip with a positive bias circuit. The addition of bypass capacitors with the value compensating the extracted excess inductance of the conductor clearly improves the performance of the chip.

Keywords

III-V semiconductors; MESFET integrated circuits; attenuators; circuit optimisation; compensation; field effect MMIC; field effect digital integrated circuits; gallium arsenide; inductance; GaAs; GaAs MESFET MMIC chips; MMIC ground pins; bypass capacitors; chip performance; conductor excess inductance; digital attenuator chip; ground plane; optimization; positive bias circuit; Attenuation; Attenuators; Capacitors; Circuit testing; Computer aided software engineering; Conductors; Equivalent circuits; Inductance; Pins; Semiconductor device measurement;

fLanguage

English

Publisher

ieee

Conference_Titel

Microwave Symposium Digest, 2002 IEEE MTT-S International

Conference_Location

Seattle, WA, USA

ISSN

0149-645X

Print_ISBN

0-7803-7239-5

Type

conf

DOI

10.1109/MWSYM.2002.1012321

Filename

1012321