Generalized segmented channel routing

This paper presents the first efficient solution to the generalized detailed routing problem in segmented channels for row-based FPGAs. A generalized detailed routing allows routing of each connection using an arbitrary number of tracks, i.e. doglegs are allowed. This approach is different from the normally followed method where each connection is routed on a single straight track. We present a router that performs generalized segmented channel routing using a greedy approach to route channels. It uses effective data-structures and pruning heuristics to keep down the time and memory requirements of the router