In-vivo validation of a compact inductively-powered neural recording interface

This paper presents the electrical and in-vivo validation of a compact, low-noise and low-power integrated circuit for the acquisition of cortical signals in a high-density implantable system. Using a three-stage topology, the proposed architecture enables a compact implementation of the analog front-end, while preserving a low-noise and lower-power performance. A wireless energy transfer module is also implemented which consists of a four-coil resonant inductive link. The proposed circuit architecture is implemented in a UMC 0.18 μm CMOS technology. The analog front-end achieves a noise efficiency factor of 4.2, consuming 9.4 μW of power within an effective area of 200 μm × 200 μm per channel. The wireless power transmission link achieves an efficiency of 36% at a separation distance of 10 mm, while providing 10 mW of DC power.