DocumentCode :
1846866
Title :
A Method to Generate Embedded Real-Time System Test Suites Based on Software Architecture Specifications
Author :
Ye, Junmin ; Dong, Wei ; Qi, Zhichang
Author_Institution :
Sch. of Comput., Nat. Univ. of Defense Technol., Changsha
fYear :
2008
fDate :
18-21 Nov. 2008
Firstpage :
2325
Lastpage :
2329
Abstract :
This paper discusses how to generate the test suites of embedded real-time systems (ERTS) at software architecture level to ensure the correctness of the system design. For that purpose, an architecture description language of distributed/embedded real-time system (DRTSADL) is used to describe configuration (structure) and behavior of the implementation under test (IUT) of ERTS. A test suites generation algorithm of ERTS based on DRTSADL specification is developed, the ideas of this algorithm are to map the DRTSADL specification into intermediate format of timed input/output automaton, and the test suites are generated with an improved Wp-method. Experiments show that the method employed in this paper can be applied to systems in practice.
Keywords :
automata theory; distributed algorithms; embedded systems; formal specification; program testing; program verification; software architecture; specification languages; Wp-method; architecture description language; distributed embedded real-time system test suite; software architecture specification; timed input-output automaton; Architecture description languages; Automata; Clocks; Connectors; Embedded computing; Real time systems; Software architecture; Software testing; System testing; Time factors; DRTSADL specification; Embedded Real-Time System; software architecture; test suites;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Young Computer Scientists, 2008. ICYCS 2008. The 9th International Conference for
Conference_Location :
Hunan
Print_ISBN :
978-0-7695-3398-8
Electronic_ISBN :
978-0-7695-3398-8
Type :
conf
DOI :
10.1109/ICYCS.2008.291
Filename :
4709335
Link To Document :
بازگشت