PWM strategy of voltage harmonics minimization for matrix converters

This paper presents a PWM strategy for minimizing the output voltage harmonics of matrix converters. The authors previously proposed a PWM strategy in this strategy, the number of commutations in all three phases during the control period can be reduced to four. In this paper, by using the detected output current values for calculating the duty cycles, the continuously varying duty cycles for a control period are developed. The algorithm for selecting the duty cycles in order to minimize the output voltage harmonics is derived. The effectiveness of the proposed PWM strategy has been verified by performing simulations.