Design of a low-power adaptive LMS equalizer for hearing-aid applications

Author

da Silva Cerqueira, J.P. ; Pavlik Haddad, S.A.

Author_Institution

Div. of Electron. Eng., Univ. of Brasilia, Brasilia, Brazil

fYear

2014

fDate

22-24 Oct. 2014

Firstpage

651

Lastpage

654

Abstract

This paper presents the design process and partial results of a low-power adaptive least mean squares (LMS) equalizer for hearing-aid applications. Energy efficiency is achieved by using a fully-serial (FS) architecture working in the above-threshold region. Prototype chips have been sent to manufacture in a standard CMOS 0.18 μm process. Partial results, comparing the behavioral and functional models, have shown a maximum error of 2.54% for the same inputs and channel characteristics. By choosing an architecture in which the priority is energy consumption rather than speed, it was possible to achieve about 140 nJ energy dissipation per sample.

Keywords

CMOS integrated circuits; adaptive equalisers; hearing aids; least mean squares methods; above-threshold region; behavioral model; channel characteristics; design process; energy 140 nJ; energy consumption; energy dissipation; energy efficiency; fully-serial architecture; functional model; hearing-aid applications; low-power adaptive LMS equalizer design; low-power adaptive least mean squares equalizer; prototype chips; standard CMOS process; Acoustics; Adaptation models; Computer architecture; Equalizers; Finite impulse response filters; Least squares approximations; Topology; CMOS digital integrated circuits; adaptive equalization; design methodology; hearing-aid devices; least mean square;

fLanguage

English

Publisher

ieee

Conference_Titel

Biomedical Circuits and Systems Conference (BioCAS), 2014 IEEE

Conference_Location

Lausanne

Type

conf

DOI

10.1109/BioCAS.2014.6981810

Filename

6981810