DocumentCode :
1849277
Title :
Output voltage integral control technique for compensating a non-ideal DC bus in voltage source inverters
Author :
Pande, M. ; Joos, G. ; Jin, H. ; Ziogas, P.D.
Author_Institution :
Dept. of Electr. & Comput. Eng., Concordia Univ., Montreal, Que., Canada
fYear :
1993
fDate :
7-11 Mar 1993
Firstpage :
761
Lastpage :
767
Abstract :
An online PWM pattern generator that inherently takes into account the DC bus ripple in generating sinusoidal output voltages is proposed. The technique is based on integrating the output voltage at a constant frequency on a pulse-by-pulse basis to insure a sinusoidal volt-second distribution irrespective of the input DC bus. The principles of operation are explained, and design equations are derived. The features of the proposed PWM pattern generated are illustrated, and the output voltage waveforms are compared to the standard sinusoidal PWM (SPWM) output. Experimental results obtained on a 5 kVA laboratory prototype confirm the feasibility of the proposed pattern generator
Keywords :
compensation; control system synthesis; invertors; pulse width modulation; voltage control; 5 kVA; DC bus ripple; VSI; design; integral control; online PWM pattern generator; output voltage waveforms; sinusoidal volt-second distribution; voltage control; voltage source inverters; Bridge circuits; DC generators; Diodes; Frequency; Minimization; Power harmonic filters; Pulse width modulation; Pulse width modulation inverters; Topology; Voltage control;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Applied Power Electronics Conference and Exposition, 1993. APEC '93. Conference Proceedings 1993., Eighth Annual
Conference_Location :
San Diego, CA
Print_ISBN :
0-7803-0983-9
Type :
conf
DOI :
10.1109/APEC.1993.290758
Filename :
290758
Link To Document :
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