DocumentCode :
1849286
Title :
A factorization-based framework for passivity-preserving model reduction of RLC systems
Author :
Su, Q. ; Balakrishnan, V. ; Koh, C.-K.
Author_Institution :
Sch. of Electr. & Comput. Eng., Purdue Univ., West Lafayette, IN, USA
fYear :
2002
fDate :
2002
Firstpage :
40
Lastpage :
45
Abstract :
Presents a framework for passivity-preserving model reduction for RLC systems that includes, as a special case, the well-known PRIMA model reduction algorithm. This framework provides a new interpretation for PRIMA, and offers a qualitative explanation as to why PRIMA performs remarkably well in practice. In addition, the framework enables the derivation of new error bounds for PRIMA-like methods. We also show how the framework offers a systematic approach to computing reduced-order models that better approximate the original system than PRIMA, while still preserving passivity.
Keywords :
RLC circuits; VLSI; circuit CAD; integrated circuit design; integrated circuit interconnections; integrated circuit modelling; reduced order systems; PRIMA model reduction algorithm; RLC interconnect; RLC systems; VLSI; critical design criteria; error bounds; factorization-based framework; interconnect effects; large scale systems; passivity-preserving model reduction; reduced-order models; Algorithm design and analysis; Contracts; Integrated circuit interconnections; Integrated circuit technology; Large-scale systems; Linear systems; Numerical analysis; Permission; Reduced order systems; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation Conference, 2002. Proceedings. 39th
ISSN :
0738-100X
Print_ISBN :
1-58113-461-4
Type :
conf
DOI :
10.1109/DAC.2002.1012591
Filename :
1012591
Link To Document :
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