DocumentCode
1850992
Title
Resynthesis and peephole transformations for the optimization of large-scale asynchronous systems
Author
Chelcea, Tiberiu ; Nowick, Steven M.
Author_Institution
Dept. of Comput. Sci., Columbia Univ., New York, NY, USA
fYear
2002
fDate
2002
Firstpage
405
Lastpage
410
Abstract
Several approaches have been proposed for the syntax-directed compilation of asynchronous circuits from high-level specification languages, such as Balsa and Tangram. Both compilers have been successfully used in large real-world applications; however, in practice, these methods suffer from significant performance overheads due to their reliance on straightforward syntax-directed translation. This paper introduces a powerful new set of transformations, and an extended channel-based language to support them, which can be used an optimizing back-end for Balsa. The transforms described in this paper fall into two categories: resynthesis and peephole. The proposed optimization techniques have been fully integrated into a comprehensive asynchronous CAD package, Balsa. Experimental results on several substantial design examples indicate significant performance improvements.
Keywords
VLSI; asynchronous circuits; circuit layout CAD; circuit optimisation; logic CAD; logic simulation; specification languages; transforms; Balsa; Tangram; asynchronous CAD package; compilers; extended channel-based language; high-level specification languages; large-scale asynchronous systems; optimization techniques; optimizing back-end; peephole transformations; performance overheads; resynthesis; syntax-directed compilation; Application software; Asynchronous circuits; Circuit synthesis; Computer science; Control system synthesis; Design automation; Design optimization; Large-scale systems; Permission; Specification languages;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference, 2002. Proceedings. 39th
ISSN
0738-100X
Print_ISBN
1-58113-461-4
Type
conf
DOI
10.1109/DAC.2002.1012659
Filename
1012659
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