Reliability technology to achieve insertion of advanced packaging (RELTECH) program

Author

Fayette, D.F. ; Speicher, P. ; Stoklosa, M. ; Evans, Joseph ; Evans, Joseph ; Gentile, M. ; Hakim, E.

Author_Institution

Rome Lab., Griffiss AFB, NY, USA

fYear

1993

fDate

24-28 May 1993

Firstpage

223

Abstract

This paper describes a joint military/commercial effort to evaluate MCM structures and represents a model for future reliability studies for other technologies. The first MCM technology evaluated is General Electric´s High Density Interconnect (HDI) structure, followed by nChips nC1000 process, IBM VCOS technology, Motorola´s C5 process on laminate, Martin Marietta chip-on-board (COB) technology and 3D stacks. The RELTECH program and the military specification activity is expected to result in a risk free transition of MCMs into DOD and commercial systems

Keywords

aerospace instrumentation; electronic equipment testing; environmental testing; life testing; military equipment; multichip modules; reliability; 3D stacks; C5 process on laminate; COB; DoD; FEA; General Electric; High Density Interconnect; IBM VCOS technology; MCM structures; Martin Marietta; Motorola; NASA; RELTECH; accelerated testing; chip-on-board technology; environmental testing; joint military/commercial effort; nChips nC1000 process; packaging; reliability; Costs; Dielectric substrates; Electronics packaging; Multichip modules; NASA; Polymer films; Qualifications; Space technology; Testing; Vehicles;

fLanguage

English

Publisher

ieee

Conference_Titel

Aerospace and Electronics Conference, 1993. NAECON 1993., Proceedings of the IEEE 1993 National

Conference_Location

Dayton, OH

Print_ISBN

0-7803-1295-3

Type

conf

DOI

10.1109/NAECON.1993.290919

Filename

290919