• DocumentCode
    1852761
  • Title

    New IC stacking process ideal for high-density memory module and hybrid applications

  • Author

    Brown, Chet

  • Author_Institution
    Cubic Memory Inc., Scotts Valley, CA, USA
  • fYear
    1995
  • fDate
    21-23 Jun 1995
  • Firstpage
    3
  • Lastpage
    16
  • Abstract
    A patented assembly technology for stacking integrated circuits, developed by Cubic Memory, Inc. (CMI), offers immediate applications for significantly increasing memory density and secondary storage capacity in PCMCIA, SIMM (Single in-line Memory Module), DIMM (Dual In-line Memory Module) and other small form factors while simultaneously reducing power consumption. The technology can also be used to combine microprocessors, memory and other ICs in very small spaces, opening new opportunities for new or more powerful types of PCMCIA cards and multi-chip modules. CMI has developed the first cost-effective process for vertical and horizontal interconnection of bare (unpackaged) semiconductor memory wafer segments or individual die. By thinning and vertically interconnecting the wafer segments, CMI has been able to achieve unparalleled storage densities. As a result, much higher density, small-form factor memory and mass storage products can be produced than have previously been available. Furthermore, the close physical proximity of the chips significantly reduces the system delay associated with interconnect capacitance and printed circuit board trace length. Performance is increased and power requirements and operating temperature are reduced. This new vertical interconnection technology opens up many new opportunities for powerful memory, secondary storage and custom applications in PCMCIA, SIMM, DLMM, multi-chip modules and other small form factors. In addition to previously unattainable densities of DRAM, SRAM and Flash memory, the technology can be used to stack custom combinations of processors, memory and other ICs to create new solutions that have not previously been possible due to space and power limitations
  • Keywords
    integrated circuit packaging; multichip modules; plastic packaging; DIMM; Dual In-line Memory Module; IC stacking process; PCMCIA; PCMCIA cards; SIMM; Single in-line Memory Module; high-density memory module; hybrid applications; interconnect capacitance; mass storage products; memory density; microprocessors; multi-chip modules; patented assembly technology; power consumption; printed circuit board trace length; secondary storage capacity; small-form factor memory; unpackaged semiconductor memory wafer segments; unparalleled storage densities; Application specific integrated circuits; Assembly; Energy consumption; Integrated circuit interconnections; Integrated circuit technology; Microprocessors; Power system interconnection; Random access memory; Space technology; Stacking;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electro/95 International. Professional Program Proceedings.
  • Conference_Location
    Boston, MA
  • Print_ISBN
    0-7803-2633-4
  • Type

    conf

  • DOI
    10.1109/ELECTR.1995.471053
  • Filename
    471053