Built-in jitter measurement methodology for spread-spectrum clock generators

In this paper, a built-in-self-test methodology for measuring frequency deviation and jitter of spread-spectrum clock generators is presented. It utilizes a phase detector to detect the clock phase of spread spectrum clock (SSC) and then measure the jitter by filtering out the low frequency component of the clock phase. Frequency of spread-spectrum clock can also be obtained by filtering out the high frequency component of the signal. The methodology is analyzed and verified with chip implementation and measurement. As an all digital design, the hardware overhead is very low.