DocumentCode :
1853641
Title :
PipeRench: A virtualized programmable datapath in 0.18 micron technology
Author :
Schmit, Herman ; Whelihan, David ; Tsai, Andrew ; Moe, Matthew ; Levine, Benjamin ; Taylor, Reed R.
Author_Institution :
Dept. of Electr. & Comput. Eng., Carnegie Mellon Univ., Pittsburgh, PA, USA
fYear :
2002
fDate :
2002
Firstpage :
63
Lastpage :
66
Abstract :
PipeRench is a programmable datapath that can be used to accelerate numerically intensive applications. The unique aspect of PipeRench is its ability to virtualize hardware through self-managed dynamic reconfiguration. This capability provides application portability and scalability without redesign or recompilation. This paper describes the implementation of PipeRench in a 0.18 micron process. The implementation has 3.65 million transistors and runs at 120 MHz. Performance is competitive with high-end commercial DSP architectures and more than five times faster than a commercial microprocessor. Executing at 33 MHz, an FIR filter without virtualization consumes 519 mW. When virtualization is required, the implementation consumes approximately 675 mW.
Keywords :
FIR filters; application specific integrated circuits; digital signal processing chips; parallel architectures; pipeline processing; reconfigurable architectures; 0.18 micron; 120 MHz; 33 MHz; 519 mW; 675 mW; FIR filter; PipeRench; application portability; high-end commercial DSP architectures; numerically intensive applications; scalability; self-managed dynamic reconfiguration; virtualized programmable datapath; Acceleration; Application software; Costs; Fabrics; Feedback; Finite impulse response filter; Hardware; Integrated circuit interconnections; Pipeline processing; Runtime;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Custom Integrated Circuits Conference, 2002. Proceedings of the IEEE 2002
Print_ISBN :
0-7803-7250-6
Type :
conf
DOI :
10.1109/CICC.2002.1012767
Filename :
1012767
Link To Document :
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