DocumentCode
1853742
Title
Networks-In-Package: Performances management and design methodology
Author
Kouadri M, A.M. ; Senouci, B. ; Petrot, Frederic
Author_Institution
TIMA Lab.-Syst. Level Synthesis Group, Grenoble
fYear
2008
fDate
23-25 April 2008
Firstpage
140
Lastpage
143
Abstract
Nowadays large scale MPSoC designs embedding multiple processors, memories and specialized IPs require high integration densities which can not be met at an acceptable cost within the standard single-chip technology. The systems-in-package (SiP) approach has been proposed then as an alternative which enables such integration requirements. Even though analysis of systems-in-package design techniques shows large similarities with standard techniques for multi-chip-modules (MCM), there is a huge methodological lack for communication-centric MPSoCs. In this paper we motivate the need for new design methodologies which addresses the various problems of the emerging NiP (networks-in- package) paradigm with a special focus on performances considerations. We also propose a complete NoC architecture (MS-NoC) and a design flow aimed at helping designers to build NiP architectures.
Keywords
integrated circuit design; network-on-chip; system-in-package; design methodology; large scale MPSoC design; memories; multichip-modules; multiple processors; networks-in-package; performances management; specialized IP; systems-in-package; Costs; Design methodology; Electronic design automation and methodology; Laboratories; Large scale integration; Network synthesis; Network topology; Network-on-a-chip; Process design; Scalability;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Design, Automation and Test, 2008. VLSI-DAT 2008. IEEE International Symposium on
Conference_Location
Hsinchu
Print_ISBN
978-1-4244-1616-5
Electronic_ISBN
978-1-4244-1617-2
Type
conf
DOI
10.1109/VDAT.2008.4542432
Filename
4542432
Link To Document