Title :
A radix-4 soft-output Viterbi architecture
Author :
Haratsch, Erich F. ; Fitzpatrick, Kelly K.
Author_Institution :
LSI Corp., Allentown, PA
Abstract :
A new radix-4 soft-output Viterbi architecture is presented, which achieves higher data rates than prior radix-2 SOVA designs. The proposed architecture is also more hardware-efficient than a previously reported radix-4 SOVA architecture. New circuits are presented for the generation of path metric differences, the path comparison unit, and reliability update unit. The presented architecture is suitable for highspeed applications such as magnetic recording, where data rates are currently approaching 3 Gb/s.
Keywords :
Viterbi decoding; magnetic recording; path comparison unit; path metric difference; radix-2 SOVA design; radix-4 soft-output Viterbi architecture; reliability update unit; CMOS technology; Circuits; Computer architecture; Detectors; Hardware; Intersymbol interference; Magnetic recording; Maximum likelihood decoding; Maximum likelihood detection; Viterbi algorithm;
Conference_Titel :
VLSI Design, Automation and Test, 2008. VLSI-DAT 2008. IEEE International Symposium on
Conference_Location :
Hsinchu
Print_ISBN :
978-1-4244-1616-5
Electronic_ISBN :
978-1-4244-1617-2
DOI :
10.1109/VDAT.2008.4542453
