DocumentCode :
1854218
Title :
A precise delay generator circuit using the average delay technique
Author :
Wu, HsinYi ; Chen, ChungChun ; Wu, ChunPang ; Tsao, HenWai
Author_Institution :
Grad. Inst. of Electron. Eng., Nat. Taiwan Univ., Taipei
fYear :
2008
fDate :
23-25 April 2008
Firstpage :
236
Lastpage :
239
Abstract :
In this paper, a precise delay generator circuit using the average delay technique is realized in 0.18-mum CMOS 1P6M technology. The proposed delay generator achieves a high resolution and programmable delay by using the average delay technique. Compared with conventional delay generators, the proposed circuit achieves a higher resolution, uses less power, and has a smaller footprint. The input frequency is 400 MHz and the resolution is 25 ps.
Keywords :
CMOS integrated circuits; clocks; delay circuits; CMOS 1P6M technology; average delay technique; precise delay generator circuit; size 0.18 mum; CMOS technology; Clocks; Delay; Energy consumption; Frequency; Multiplexing; Phased arrays; Power generation; Signal resolution; Tuned circuits;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Design, Automation and Test, 2008. VLSI-DAT 2008. IEEE International Symposium on
Conference_Location :
Hsinchu
Print_ISBN :
978-1-4244-1616-5
Electronic_ISBN :
978-1-4244-1617-2
Type :
conf
DOI :
10.1109/VDAT.2008.4542456
Filename :
4542456
Link To Document :
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