Title :
The efficient implementation of an array multiplier
Author :
Wang, Guoping ; Shield, James
Author_Institution :
Indiana Univ. Purdue Univ. Fort Wayne, IN
Abstract :
Multiplication is one of the basic and critical operations in the computations. Efficient implementations of multipliers are required in many applications. In this paper, a new implementation of the array multiplier for unsigned numbers is proposed which significantly reduces the silicon area compared to recently published array multiplier while with no penalty of speed and power. The proposed scheme is applicable for VLSI and FPGA application and it can be easily extended to signed number computations
Keywords :
multiplying circuits; FPGA application; VLSI application; array multiplier; signed number computations; unsigned numbers; Encoding; Field programmable gate arrays; Neural networks; Silicon compounds; Tree data structures; Very large scale integration; Wires;
Conference_Titel :
Electro Information Technology, 2005 IEEE International Conference on
Conference_Location :
Lincoln, NE
Print_ISBN :
0-7803-9232-9
DOI :
10.1109/EIT.2005.1626958
