DocumentCode
1854892
Title
Modelling a static VAr compensator using EMPT
Author
De Lima, Antonio Carlos S ; Wanderley, Saulo S. ; Stephan, Richard M.
Author_Institution
COPPE, Univ. Federal do Rio de Janeiro, Brazil
Volume
1
fYear
1995
fDate
13-16 Aug 1995
Firstpage
219
Abstract
A digital simulation of a static VAr compensator (SVC) using a thyristor controlled reactor (TCR) and fixed capacitor (FC) is presented. This configuration is widely used in power system applications. The model is tested under EMTP (ATP version)
Keywords
digital simulation; power system analysis computing; power system control; static VAr compensators; thyristor applications; ATP version; EMPT; digital simulation; fixed capacitor; power system applications; static VAr compensator modelling; thyristor controlled reactor; Capacitors; Circuit testing; Digital simulation; EMTP; Inductors; Power system modeling; Power system simulation; Proportional control; Regulators; Static VAr compensators; Steady-state; Testing; Thyristors; Voltage control;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1995., Proceedings., Proceedings of the 38th Midwest Symposium on
Conference_Location
Rio de Janeiro
Print_ISBN
0-7803-2972-4
Type
conf
DOI
10.1109/MWSCAS.1995.504417
Filename
504417
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