DocumentCode :
1855009
Title :
Managing the bottlenecks in parallel Gauss-Seidel type algorithms for power flow analysis
Author :
Huang, G. ; Ongsakul, W.
Author_Institution :
Dept. of Electr. Eng., Texas A&M Univ., College Station, TX, USA
fYear :
1993
fDate :
4-7 May 1993
Firstpage :
74
Lastpage :
81
Abstract :
In the authors´ earlier papers, the parallelization and implementations of Gauss-Seidel (G-S) algorithms for power flow analysis have been investigated on a Sequent Balance shared memory (SM) machine. In this paper, the authors generalize the idea to more general computer architectures and demonstrate how to effectively increase the speedup upper bounds of G-S algorithms by properly managing the bottlenecks on both Sequent Balance SRM and nCUBE2 distributed memory (DM) machines. For G-S algorithms, when the coloring process is used to schedule the processors, there is almost no sequential portion. Thus, the only decisive factor left, which has a direct impact on the speedup upper bound, is the synchronization overhead. Accordingly, the authors propose a new synchronization scheme which can reduce the synchronization overhead on the Sequent Balance machine, Also, on the nCUBE2 machine, a new clustered G-S algorithm is proposed and implemented. The algorithm carefully schedules their processors, computational loads and communication overheads for the best performance. In addition, the synchronization overheads and speedup upper bounds on both machines are analyzed in terms of power system size and number of processors. The competitiveness of G-S type algorithms is also discussed
Keywords :
distributed memory systems; load flow; parallel algorithms; power system analysis computing; shared memory systems; Sequent Balance shared memory machine; computer architectures; nCUBE2 distributed memory machines; parallel Gauss-Seidel type algorithms; power flow analysis; speedup upper bounds; synchronization; Clustering algorithms; Computer architecture; Gaussian processes; Load flow analysis; Memory management; Power system analysis computing; Processor scheduling; Samarium; Scheduling algorithm; Upper bound;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Power Industry Computer Application Conference, 1993. Conference Proceedings
Conference_Location :
Scottsdale, AZ
Print_ISBN :
0-7803-1301-1
Type :
conf
DOI :
10.1109/PICA.1993.291033
Filename :
291033
Link To Document :
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