• DocumentCode
    1855017
  • Title

    RTL-level modeling of an 8B/10B encoder-decoder using SystemC

  • Author

    Aref, I.A. ; Ahmed, N.A. ; Salazar, F. Rodriguez ; Elgaid, K.

  • Author_Institution
    Dept. of Electron. & Electr. Eng., Univ. of Glasgow, Glasgow
  • fYear
    2008
  • fDate
    5-7 May 2008
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    This paper presents an RTL-level model of an 8B/10B encoder/decoder block in SystemC. The use of 8B/10B coding is an important technique in the construction of high performance serial interfaces. These are particularly suitable for alleviating the I/O bottleneck of state of the art systems (which are pinout, rather than bandwidth limited). SystemC has been chosen because it provides a homogeneous design flow for complex designs (i.e. SoC and IP based design), where system modeling at the early stages of the design becomes increasingly important.
  • Keywords
    decoding; encoding; hardware description languages; logic CAD; system-on-chip; IP based design; RTL-level modeling; SoC; SystemC; decoder; encoder; serial interfaces; Bandwidth; Block codes; Communication networks; Costs; Data communication; Decoding; Encoding; Hardware; Modeling; Prototypes; 8B/10B; Decoder; Encoder; IP; Modeling; Pinout; RTL; SoC; SystemC;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Wireless and Optical Communications Networks, 2008. WOCN '08. 5th IFIP International Conference on
  • Conference_Location
    Surabaya
  • Print_ISBN
    978-1-4244-1979-1
  • Electronic_ISBN
    978-1-4244-1980-7
  • Type

    conf

  • DOI
    10.1109/WOCN.2008.4542493
  • Filename
    4542493