Title :
Worst case analysis of low-voltage analog MOS integrated circuits
Author :
To, Hing-yan ; Michael, Christopher ; Ismail, Mohammed
Author_Institution :
Dept. of Electr. Eng., Ohio State Univ., Columbus, OH, USA
Abstract :
A methodology for worst case analysis of low voltage analog MOS integrated circuits is presented. It relates parameter to current mismatch in a transistor pair analytically and the current mismatch is regarded as a random variable. It is shown that the algorithm is efficient and is readily extended to the circuit level. The effect of the active area of critical transistor pairs is also investigated. The methodology is used to study the DC offset in low voltage CMOS op amps
Keywords :
MOS analogue integrated circuits; circuit analysis computing; integrated circuit design; integrated circuit noise; operational amplifiers; CMOS op amps; DC offset; active area; circuit level; low-voltage analog MOS integrated circuits; parameter to current mismatch; transistor pair; worst case analysis; Circuit optimization; Circuit simulation; Computer aided software engineering; Equations; Low voltage; MOS integrated circuits; Operational amplifiers; Performance analysis; Principal component analysis; Random variables; Statistics;
Conference_Titel :
Circuits and Systems, 1995., Proceedings., Proceedings of the 38th Midwest Symposium on
Conference_Location :
Rio de Janeiro
Print_ISBN :
0-7803-2972-4
DOI :
10.1109/MWSCAS.1995.504431
