Title :
Development and synthesis method for pass-transistor logic family for high-speed and low power CMOS
Author :
Oklobdzija, Vojin G. ; Soderstrand, Michael ; Duchene, B.
Author_Institution :
Dept. of Electr. & Comput. Eng., California Univ., Davis, CA, USA
Abstract :
This paper presents a new pass-transistor logic termed DVL which contains fewer transistors and has better performance than other CMOS logic families. A method for synthesis of DVL is also developed and demonstrated. This new logic has advantages over CMOS and is characterized by excellent speed and low power
Keywords :
CMOS logic circuits; circuit CAD; integrated circuit design; logic CAD; logic design; CMOS logic family; DVL design; high-speed CMOS; low power CMOS; pass-transistor logic family; synthesis method; CMOS logic circuits; CMOS technology; Circuit synthesis; High performance computing; Logic gates; Logic programming; Page description languages; Testing; Threshold voltage; Wires;
Conference_Titel :
Circuits and Systems, 1995., Proceedings., Proceedings of the 38th Midwest Symposium on
Conference_Location :
Rio de Janeiro
Print_ISBN :
0-7803-2972-4
DOI :
10.1109/MWSCAS.1995.504436
